Studies conducted by the inventor of the present invention have revealed that technologies concerning a wireless communication circuit forming a wireless communication system are described, for instance, in Japanese Patent Application Laid-Open Publication No. 2007-189569, Japanese Patent Application Laid-Open Publication No. 2004-304330, and Japanese Patent Application Laid-Open Publication No. 2000-36564.
Japanese Patent Application Laid-Open publication No. 2007-189569 describes a unit that implements a variable-gain amplifier while input impedance matching is achieved. Four cascode transistors (the first to fourth cascode transistors) are selectively operated to form a variable-gain amplifier that distributes a current flowing in a load circuit. A load circuit for an output node is formed by a parallel resonance circuit which includes a first inductor and a first capacitor, and a serial resonance circuit which includes a second inductor, a second capacitor and a first resistor.
Japanese Patent Application Laid-Open Publication No. 2004-304330 describes an amplifier circuit capable of varying the frequency response of an input signal and a semiconductor integrated circuit device having such an amplifier circuit. From a power supply potential wiring to a ground potential wiring, a first inductor, a first resistor, a first output terminal, and a first transistor are series-connected in the order named, and in parallel with these, a second inductor, a second resistor, a second output terminal, and a second transistor are series-connected in the order named. Further, a first variable capacitor is connected to a connection point between the first inductor and the first resistor with a second variable capacitor connected to a connection point between the second inductor and the second resistor to form a variable-resonance-frequency load circuit.
Japanese Patent Application Laid-Open Publication No. 2000-36564 describes a variable resistor, which is used, for instance, as an attenuator for a high-frequency input signal, and a variable gain circuit, which outputs, for instance, a harmonic input signal after amplifying it by a desired gain. A first inductor is connected between a drain terminal and a source terminal of a first field-effect transistor in which the resistance values of the drain terminal and source terminal vary with a control voltage input to a gate terminal of the first field-effect transistor. As for a DC signal, the first inductor forms a short circuit between the drain terminal and source terminal to reduce the potential difference to zero. As for a high-frequency signal, the first inductor indicates an impedance in accordance with the frequency of the signal. The field-effect transistor and the inductor form a parallel circuit to provide variable resistance.